For more than a decade Intel has been failing to get new instructions and accelerators into use. Operating systems, libraries, compilers, and such have a lot to blame, but if new features aren't widely available enough that software will actually use it they might as well not exist.
Intel wants you think it is business genius to use expensive die area for fused off features that they can charge 5% of users exorbitantly for. It is peak vice signalling, but is a business disaster for real because if you aren't paying for the features you can't use, Intel's shareholders are paying for it.
We just had this conversation. In many regards, Intel and AMD are doing better at the whole RISC thing than Apple and Qualcomm are. The ARM SIMD acceleration scenario is reaching a fever-pitch and not even the proprietary solutions are competitive with SOTA. The ISA is fragmented simply trying to copy 90s technology. Apple is the flagbearer on a crusade to nowhere.
Methinks the industry should have been nicer to Khronos when they tried rallying everyone under one compute library. But hey, there's still plenty of time to be proven right.
For more than a decade Intel has been failing to get new instructions and accelerators into use. Operating systems, libraries, compilers, and such have a lot to blame, but if new features aren't widely available enough that software will actually use it they might as well not exist.
Intel wants you think it is business genius to use expensive die area for fused off features that they can charge 5% of users exorbitantly for. It is peak vice signalling, but is a business disaster for real because if you aren't paying for the features you can't use, Intel's shareholders are paying for it.