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Reincarnating the 6502 Using Flexible TFT Tech for IoT (wikichip.org)
70 points by rbanffy on May 9, 2022 | hide | past | favorite | 30 comments


It's now possible to make a 6502 out of plastic?!? WOW

Yes, they are making transistors out of plastic[1]. ”We coat everything on that, then peel it off and reuse the glass a carriers which means we can use silicon equipment.”

That they manage to get this to work at all is amazing. I view this as a technology demonstrator more than anything else. It looks like there's a pent up demand for low end processing that this might fill.

Who knows, maybe Sam Zeloof can use this process in his garage. 8)

1 - https://www.eenewseurope.com/en/first-300mm-fab-for-the-uk/


There's a huge demand for low-end processing, but it's less clear if there's a huge demand for less-power-efficient processing. Anything with batteries will have to spend more on batteries. It could be good for automotive if they can hit the temperature range specs. Cars have lots of small CPUs and a few milliwatts when running isn't significant.


Reminds me of microfiches [0], which sometimes can be seen in movies when people go to a library to read old, archived newspapers.

My dad had a catalog of spare parts from Bosch and a reader, and I loved to spend time with it to look at the diagrams. This was pre-internet days, so this was the way how large catalogs were distributed.

The precision with which they were created was impressive.

These wafers look similar. I wonder how the information density would compare if some of those chips were storage and a couple of them could be used to display the content of the storage.

[0] https://en.wikipedia.org/wiki/Microform#/media/File:Microfic...


It was also how computers were documented, since the paper would take up tens of feet of shelves. You could get the source code for VMS on fiche for example.


There were some very long term backup devices using microfiches, not quite active logic but at least a form of memory.


The chip achieved a maximum operating speed of 71.4 kHz (at Vdd=3V/Vbias=6V) while consuming a maximum of 134.91 mW.

That's a lot of power for 0.072 MHz. Compare [1] It's nice that it's flexible, but for a wearable, you'd only get a few hours on a coin cell.

[1] https://www.st.com/content/st_com/en/products/microcontrolle...


Give it a few iterations though and it could become very useful, at least they have something working, usually from there it is incremental improvements to the limit of the tech in a reasonably short time.


They implemented their own complete design flow for flexible TFT. That's pretty cool. I'm not so sure there's a real use case for a 70 KHz flex 6502. Is "for IoT" the new "for developing countries", a shorthand for "we don't have a practical or profitable niche for this yet"? Cheap IoT SoCs already have great processors for very competitive prices.


I learned to code machine language on the VIC-20’s 6502 when I was 13. I think my parents paid about $200 for the computer.

It was thrilling to learn to make things even with basic, but to do much with graphics or games at the time required direct 6502 coding to get decent performance.

Good memories though. So different coding only for joy with no stress or deadlines.


There was always a trade off between flexibility and consistent electronic operation. If you bend the chip too much it stops working. If the chip is too rigid its not interesting.

Would be good if the write up could give some context into the bend-ability of this chip.


Indeed, I was looking for a minimum bending radius but did not find it. I'm pretty sure they have that data though, it would be one of the first things that people looking at applications for this tech would want to know about.

What interests me is that given the bending radius that you could simply roll up a whole device to some given diameter and be done with it, a typical case would be an aluminum tube that could be very easily totally sealed.


>The chip achieved a maximum operating speed of 71.4 kHz (at Vdd=3V/Vbias=6V) while consuming a maximum of 134.91 mW. Likewise, the chip can run as low as 10 kHz at 2V while consuming just 11.6 mW.

That's really not that impressive, both in speed and power. You can operate 8Bit MCUs clocked at ~50kHz at 100-200µW.

I wonder what that the technology is good for? IGZO is good for large area electronic with low leakage, so I guess it could be used for sensor arrays and similar where you need distributed circuits. Of course, IGZO is already used for display backplanes.

For digital circuits, silicon will most likely beat it in power and cost even for very small designs.


It doesn't help that the ag_6502 core they're using is designed to accurately reproduce the behavior of the original part, not to be space- or power-efficient. Results might have been better with a more modern CPU design like SERV (https://github.com/olofk/serv).


It's not that the pig is dancing badly, it is the fact that the pig dances at all that makes it impressive.


If you were designing a cool feature for a plastic bag, would you prefer a few square inches on a flexible substrate, or the same amount of compute on a non-flexible substrate that's only the size of a grain of sand?

As far as I can see, all benefits of flexibility can be had by just making the non-flexible bit small enough.


If you want sensors, flexible solar cells and/or LEDs all over your bag, you would have to add many grains of sand-sized things, and still need a flexible substrate to connect them.

(And no, we aren’t there by a wide margin, but I think something like that is part of the vision)


As pointed out in the article, the 6502 is still widely used in all sorts of embedded devices, but I suspect the 8051 is even more popular. The 6502 has the advantage of somewhat simpler design.


8051 has some really nice bit-level instructions. Everything interesting for 6502 is typically on bit 7 because it's so easy to test (BPL/BMI), or more rarely bit 6 which I think can be easily tested with BIT, and you don't have anything like JBC which jumps if a bit is set and clears it.


I've used both as well as the 6809, in order of preference 6809, 6502 and very distant third the 8051.


Rockwell 6502s have bbr/bbs (branch on bit set/reset in a zp address) - I think for use with io ports mapped into zero page (they’re not terribly useful otherwise).


Page zero is amazing. It felt like having 256 registers to use.


That is exactly how it is meant to be used. Nice little tidbit: the 6809 allowed you to move the 'zero page' anywhere you wanted (of course not really a zero page when you move it to another page than zero, but you get the idea).


The 6502's successor -- the 65816 -- also allowed this; could be moved to anywhere in the first 64k. Renamed to "direct page."


Yes, I have a prototype chip of the 65816 somewhere in a moving box, I really had high hopes that that would be the future and then 68K happened and I was sold on Motorola, and a while later had to adapt to x86 which I've always found ugly and non-orthogonal.


The 816 starts to look fine on paper at first but it's a pain in the ass to program and interface. 24-bit address bus but no registers wide enough to hold an address, and paged memory. Instead of adding new 16-bit registers, they just widened the existing ones and added mode switch flags. Extra 8 physical address lines are multiplexed with the data bus, so external bus logic required to do anything with them.

It's just kind of an awkward hack. It's fast though.


I had the 65816 in much higher regard before I tried to program for it. It's every bit as fun to program for as the 8086. I don't think it would have sold well were it not for Apple and their IIgs.


Same. I liked it on paper until I wrote code for it. Then I grew to hate it.

Wish WDC had made a "true" 16 or 32-bit 65xx. Forget the mode switching and extend the opcode set (by adding some two-byte instructions via a prefix-byte or something) to add additional 16 and 24-bit register access modes so one could get full linear 24-bit addressing. And let the direct page and stack sit anywhere in the 24-bit address space rather than just in the lowest page.

In the end I think the 65816 is mostly just a 6502 with some extra stuff bolted on the front of the instruction decoder. Quick and dirty, not much of a step up from the various 6502 + external bank switching we saw in the 80s.


I keep recalling that line from "The soul of a new machine" 'No mode bit.'


I briefly looked at what it would take to write a 816 backend for LLVM, and the mode bit significantly complicates things.


I never built the board that I had planned on, getting the chip took forever.




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